The present invention relates to a phase difference detector for detecting a phase difference between two input signals and also relates to a jitter detector and jitter detecting method for detecting the amount of jitter between the two input signals.
FIG. 12 is a circuit diagram illustrating a configuration for a known phase difference detector 90. Hereinafter, it will be described how this circuit operates. First, two signals of a phase locked loop (PLL) circuit (not shown), i.e., the input and output of the PLL circuit, are provided as first and second input signals 101 and 102 to the phase difference detector 90. A comparison pulse generator 901 generates a pulse signal 902 that contains information about the phase difference between these two input signals. The pulse signal 902 is used as a control signal for charging pump current sources 9031 and 9032 and is converted into a current pulse. Accordingly, a charge, reflecting the phase difference between the input signals 101 and 102, is stored on a capacitor 904.
Next, a sample-and-hold (S/H) circuit 907 samples, holds and outputs a voltage of the capacitor 904 at respectively predetermined times. Thus, the sample-and-hold circuit 907 can output an analog voltage value representing the phase difference. After the voltage has been sampled and held, the capacitor 904 is reset by a switch 911, which turns ON at the same period as that of the sample-and-hold circuit 907.
Accordingly, every time the phases of the first and second input signals 101 and 102 are compared to each other, the resultant phase difference is output as an analog voltage from the sample-and-hold circuit 907. If the magnitude of this output is sufficiently great and if the output of this phase difference detector 90 may be an analog value, then the output of the sample-and-hold circuit 907 is used as the output of the phase difference detector 90.
An amplifier 906 amplifies the output voltage of the sample-and-hold circuit 907 and then outputs the amplified voltage. An A/D converter 908 performs A/D conversion on the output voltage of the amplifier 906, thereby outputting a digital value.
If the magnitude of the output of the sample-and-hold circuit 907 is not so great and if the output of this phase difference detector 90 may be an analog value, then the output of the amplifier 906 is used as the output of the phase difference detector 90. Alternatively, if the output of the phase difference detector 90 should be a digital value, then the output of the A/D converter 908 is used as the output of the phase difference detector 90.
Furthermore, by monitoring a variation in the phase difference between the two input signals that has been output from the phase difference detector 90, jitter between these input signals can be detected. Thus, the jitter created in the PLL circuit can be detected.
In the phase difference detector 90 like this, however, the capacitor 904 should be charged and the output voltage thereof should be monitored. Thus, an analog value is obtained as a first output. But it is difficult to monitor a variation of a potential that has been output as an analog value. Also, since the A/D converter 908 is needed to obtain a digital output value from the phase difference detector 90, the circuit size and power dissipation of the phase difference detector 90 both increase.
Furthermore, the amount of jitter should ideally be as small as possible, and therefore, it is normally necessary to monitor that very small jitter accurately enough. For that purpose, the phase difference detector 90 is required to either increase the quantity of charge stored on the capacitor 904 by raising the amount of currents supplied from the current sources 9031 and 9032 or amplify the monitored voltage by inserting the amplifier 906 into the output stage thereof.
Moreover, every time the phases are compared to each other, the voltage of the charged capacitor 904 should be sampled and held. Accordingly, the sample-and-hold circuit 907 should operate in a broad frequency band exceeding the frequencies of the input signals 101 and 102.
It is therefore an object of the present invention to provide a phase difference detector for outputting a phase difference between two input signals as a digital value without increasing the circuit size thereof.
Another object of the present invention is to provide a jitter detector and jitter detecting method that can detect jitter between the input signals much more easily by utilizing the digital value and without increasing the circuit size thereof.
An inventive jitter detector detects and outputs jitter between first and second input signals as a variation in period of a periodic signal by: receiving the first and second input signals and a clock signal; sequentially accumulating phase differences between the first and second input signals; generating the periodic signal every time a result of the accumulation exceeds a predetermined value; and obtaining the period of the periodic signal based on a period of the clock signal.
Another inventive jitter detector includes comparison pulse generator, periodic signal generator, counter and arithmetic unit. The comparison pulse generator outputs one phase difference comparison pulse after another. Each phase difference comparison pulse has a width representing a phase difference between first and second input signals. The periodic signal generator outputs a periodic signal every time a value obtained by accumulating the widths of the phase difference comparison pulses exceeds a predetermined value. The counter receives the periodic signal and a clock signal with a period shorter than a period of the periodic signal, counts the number of pulses of the clock signal during one period of the periodic signal and outputs a resultant count. And the arithmetic unit detects and outputs a variation in the count as jitter between the first and second input signals.
According to the present invention, a phase difference between input signals is converted into a digital value representing the period of a periodic signal and the jitter is detected based on this value. Thus, the jitter can be obtained without using any A/D converter or the like. In addition, an average jitter over multiple periods and a variance, which is used as an index to a variation in jitter, can also be easily calculated.
In one embodiment of the present invention, the periodic signal generator may include charging pump circuit, capacitor and comparator. The charging pump circuit outputs a charge in a quantity corresponding to the width of each said phase difference comparison pulse. The capacitor stores thereon the charge that has been output from the charging pump circuit. And comparator compares a voltage of the capacitor to a predetermined reference voltage. When the periodic signal is output, the capacitor discharges. And every time the voltage of the capacitor exceeds the reference voltage, the comparator outputs the periodic signal.
In such an embodiment, the widths of the phase difference comparison pulses are accumulated after having been converted into charge quantities. Thus, the widths of the phase difference comparison pulses can be accumulated easily.
In another embodiment of the present invention, the jitter detector may further include an edge detector for converting the first and second input signals into first and second timing signals, respectively. The edge detector outputs the first and second timing signals as input signals for the comparison pulse generator. The first timing signal has an edge synchronized with a first edge of the first input signal. The second timing signal has an edge synchronized with a second edge of the second input signal and also has a period approximately equal in length to a period of the first input signal. And a time-lag between the first and second edges is equal to or shorter than a period of the second input signal.
In such an embodiment, even if the frequency of the second input signal is approximately n times (where n is an integer) as high as that of the first input signal, the jitter between these input signals is easily detectable, too.
Still another inventive jitter detector includes differential signal converter, periodic signal generator, counter and arithmetic unit. The differential signal converter converts a first input signal into first and second differential signals and a second input signal into third and fourth differential signals. The first and second differential signals are non-inverted and inverted against the first input signal, respectively, while the third and fourth differential signals are non-inverted and inverted against the second input signal, respectively. The periodic signal generator obtains one phase difference comparison pulse after another responsive to the first through fourth differential signals. Each phase difference comparison pulse has a width representing a phase difference between the first and second input signals. The periodic signal generator outputs a periodic signal every time a value obtained by accumulating the widths of the phase difference comparison pulses exceeds a predetermined value. The counter receives the periodic signal and a clock signal with a period shorter than a period of the periodic signal, counts the number of pulses of the clock signal during one period of the periodic signal and outputs a resultant count. And arithmetic unit detects and outputs a variation in the count as jitter between the first and second input signals.
In such an embodiment, the phase difference comparison pulses can be obtained by using a relatively simple configuration.
In one embodiment of the present invention, the periodic signal generator may include charging pump circuit, capacitor and comparator. The charging pump circuit performs an OR operation on a logical product of the first and fourth differential signals and a logical product of the second and third differential signals to obtain a logical sum of these logical products as each phase difference comparison pulse. The charging pumping circuit also outputs a charge in a quantity corresponding to the width of the phase difference comparison pulse. The capacitor stores thereon the charge that has been output from the charging pump circuit. And the comparator compares a voltage of the capacitor to a predetermined reference voltage. When the periodic signal is output, the capacitor discharges. And every time the voltage of the capacitor exceeds the reference voltage, the comparator outputs the periodic signal.
In such an embodiment, even when the phase difference comparison pulses are obtained responsive to the differential signals, the pulse widths are also accumulated as charge quantities. Thus, the widths of the phase difference comparison pulses can be accumulated easily.
In an alternative embodiment, the jitter detector may further include an edge detector for converting the first and second input signals into first and second timing signals, respectively. The edge detector outputs the first and second timing signals as input signals for the differential signal converter. The first timing signal has an edge synchronized with a first edge of the first input signal. The second timing signal has an edge synchronized with a second edge of the second input signal and also has a period approximately equal in length to a period of the first input signal. And a time-lag between the first and second edges is equal to or shorter than a period of the second input signal.
In such an embodiment, even if the frequency of the second input signal is approximately n times as high as that of the first input signal where the phase difference comparison pulses should be obtained responsive to the differential signals, the jitter between these input signals is also easily detectable.
An inventive phase difference detector outputs a phase difference between first and second input signals as a period of a periodic signal by: receiving the first and second input signals and a clock signal; sequentially accumulating phase differences between the first and second input signals; generating the periodic signal every time a result of the accumulation exceeds a predetermined value; and obtaining the period of the periodic signal based on a period of the clock signal.
In such an embodiment, a value corresponding to the phase difference between the input signals can be obtained as a digital value without using any A/D converter or the like.
An inventive jitter detecting method is adapted to detect jitter between first and second input signals as a variation in period of a periodic signal. The method includes the steps of: sequentially accumulating phase differences between the first and second input signals; generating the periodic signal every time a result of the accumulation exceeds a predetermined value; and obtaining the period of the periodic signal based on a period of a clock signal.
In such an embodiment, a value corresponding to the phase difference between the input signals can be obtained as a digital value without using any A/D converter or the like. Thus, the average or variance of the jitter can be easily obtained.
It should be noted that the xe2x80x9cclock signalxe2x80x9d herein includes a pulse signal with a constant period shorter than that of the periodic signal.